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  1 / 4 www.asb.co.kr j u n e 2 0 1 7 p lerow tm ALN2501AT internally matched lna module the plerow tm aln - series is the compactly designed surface - mount module for the use of the lna with or withou t the following gain blocks in the infrastructure equipment of the mobile wireless (cdma, gsm, pcs, phs, wcdma, dmb, wlan, wibro, wimax), gps, satellite commun i- cation terminals , catv and so on. it has an exceptional performance of low noise figure, high ga in, high oip3, and low bias current. the stability factor is always kept more than unity over the application band in order to ensure its unconditionally stable implementation to the application system environment. the surface - mount module package includin g the completed matching circuit and other components necessary just in case allows very simple and convenient implementation onto the system board in mass production level. parameter unit specifications min typ max frequency range mhz 2300 2700 gain db 11.2 12.2 gain flatness db ? 0.75 ? 0.95 noise figure db 0.65 @2.3g 0.85 @2.7g output ip3 (1) dbm 33 34 s11 / s22 (2) db - 19 / - 9 o utput p1db dbm 18 19 switching time ? sec 1.0 supply current ma 80 100 supply voltage v 5 impedance ? 50 package type & size mm surface mount type, 10wx10lx3.8h operating temperature is - 40 ? c to +85 ? c. 1) oip3 is measured w ith two tones at an output power of 7 dbm / tone separated by 1 mhz. 2) s11/s22 (max) is the worst value within the frequency band. 3) switching time means the time that takes for output power to get stabilized to its final level after switching dc voltage from 0 v to v s . pin number function 2 rf in 5 rf out 6 +vcc other s ground ou t line drawing (unit: mm) feature s s 21 = 12.95 db @ 2300 mhz = 11.45 db @ 2700 mhz nf = 0.65 db @ 2300 mhz = 0.85 db @ 2700 mhz unconditionally stable single 5v supply high oip3 @ low current note: 1. the number and size of ground via holes in a circuit board is critical for thermal rf grounding consider a tions. 2. we recommend that the ground via holes be placed on the bottom of all ground pins for better rf and thermal performance, as shown in the dra w ing at the left side. description (recommended footprint) ALN2501AT asb inc. (top view) (bottom view) ? 0.4 plated thru holes to ground plane plerow (side view) website: www.asb.co.kr e - mail: sales@asb.co.kr tel: (82) 42 - 528 - 722 3 f ax : (82) 42 - 528 - 7222 more inform a tion 1 - stage single type typ. @ t = 25 ? c, v s = 5 v, freq. = 2500 mhz, z o.sys = 50 ohm solder stencil area specifications (in pr o duction)
2 / 4 www.asb.co.kr j u n e 2 0 1 7 p lerow tm ALN2501AT internally matched lna module s - param e ters noise figure oip3 p1db 2300~2700 mhz +5 v typical performance (measured) s - parameters & k factor 0 500 1000 1500 2000 2500 3000 3500 4000 4500 5000 -70 -60 -50 -40 -30 -20 -10 0 10 20 30 0 1 2 3 4 5 6 7 8 9 10 s12 s11 s22 s21 stability factor k s-parameter [db] frequency [mhz]
3 / 4 www.asb.co.kr j u n e 2 0 1 7 p lerow tm ALN2501AT internally matched lna module s - param e ters noise figure oip3 p1db 2500~3000 +5 v stability fa c tor (k) typical performance (measured) 0 500 1000 1500 2000 2500 3000 3500 4000 4500 5000 -70 -60 -50 -40 -30 -20 -10 0 10 20 30 0 1 2 3 4 5 6 7 8 9 10 s12 s11 s22 s21 stability factor k s-parameter [db] frequency [mhz]
4 / 4 www.asb.co.kr j u n e 2 0 1 7 p lerow tm ALN2501AT internally matched lna module 1) the ta ntal capacitor is optional and for bypassing the ac noise introduced from the dc supply. the capacitance value may be dete r mined by customer s dc supply status. 2) so - called dc blocking capacitors are always necessarily placed at the input and output port for allowing only the rf signal to pass and blocking the dc component in the signal. the dc blocking capacitors are included inside the lna module. therefore, c1 & c2 capacitors may not be necessary, but can be added just in case that the customer wants. the value of c1 & c2 is determined by considering the application fr e quency. copyright ? 2007 - 2017 asb inc. all rights reserved. datasheet subject to change without notice. asb assumes no re- sponsibility for any errors which may appear in this datasheet. no part of the datasheet may be copied or reproduced in any form or by any means without the prior written consent of asb. application circuit recommended soldering reflow process evaluation board layout + - aln out in c1 c2 tantal c a pacitor v dc 20~40 sec 260 ? c 200 ? c 150 ? c 60~180 sec ramp - up (3 ? c/sec) ramp - down (6 ? c/sec) size 25 x 25mm in out +vcc (for aln - at, bt, t series C 10x10mm)


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